Micron Technology DRAM SDRAM-DDR3L, Part #: MT41K64M16TW-107 XIT:J TR features: • VDD = VDDQ = +1.35V (1.283V to 1.45V) • Backward compatible to VDD = VDDQ = 1.5V ±0.075V • Differential bidirectional data strobe • 8n-bit prefetch architecture • Differential clock inputs (CK, CK#) • 8 internal banks • Nominal and dynamic on-die termination (ODT) for data, strobe, and mask signals • Programmable CAS (READ) latency (CL) • Programmable CAS additive latency (AL) • Programmable CAS (WRITE) latency (CWL) • Fixed burst length (BL) of 8 and burst chop (BC) of 4 (via the mode register set [MRS]) • Selectable BC4 or BL8 on-the-fly (OTF) • Self refresh mode • TC of -40°C to 105°C – 64ms, 8192-cycle refresh at -40°C to 85°C – 32ms at 85°C to 105°C • Self refresh temperature (SRT) • Automatic self refresh (ASR) • Write leveling • Multipurpose register • Output driver calibration • AEC-Q100 • PPAP submission • 8D response time

MIL:MT41K64M16TW-107 XIT J TR

MT41K64M16TW-107 XIT:J TR